insideHPC

SiFive Announces RISC-V Products for GenAI and ML

The SiFive Performance P870 and SiFive Intelligence X390 offer a new level of low power, compute density, and vector compute capability, and when combined provide the necessary performance boost for ...
Semiconductor Engineering

Towards Base-Station-On-Chip: Wireless Communication Kernels On A RISC-V Vector Processor (TU Dresden, CeTI)

A new technical paper titled “Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication” was published by researchers at TU Dresden and Centre for Tactile Internet with ...
EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
EDN

Dynamic vector threading for vRAN, massive MIMO in 5G

Now that we’re getting comfortable with 5G, network operators are already planning for 5G-Advanced, release 18 of the 3GPP standard. The capabilities enabled by this new release—extended reality, ...
Business Wire

SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors

SANTA CLARA, Calif.--(BUSINESS WIRE)--SiFive, Inc., the gold standard for RISC-V computing, today announced that the company has partnered with Kinara to create a USB-based enablement board that ...