A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...

In recent years we have begun to see references to “RF” CMOS processes and to “RF” models for those processes. This article will explore what the real meanings of such “RF” designations are, and what ...

Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved. But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a ...

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...

A schematic diagram is not a detailed blueprint of an analog circuit; instead, it’s more like architectural sketch of the circuit. Look at any schematic for a CMOS analog IC circuit and you will see ...

CMOS technology has dominated the IC business for the last 25 years and will continue to do so for another 25 years, according to the author of CMOS Circuit Design, Layout, and Simulation. He explains ...