As 4th-generation serial protocols such as PCIe 4.0, USB 3.1, and SAS4 become more complex, it has become increasingly difficult to place a receiver being tested into an appropriate state (such as a ...

With the CDR option, the 12.5-Gbit BERT can use input data as a trigger signal for error-rate detection and waveform monitoring. An external clock or CDR isn't required. When the CDR option is used ...

Offering the most complete jitter-tolerance testing for the highest-speed digital interfaces, the J-BERT N4903B serial bit-error-rate tester lets designers create robust products with tighter margins ...